
Hardware Description of LCN Node Processors – HMPU Processor and Associated Boards
12/01 Application ModuleX Service 29
Honeywell
3.3 HMPU Processor and Associated Boards
Overview
The HMPU node processor has a 68020 microprocessor and includes
floating point calculation hardware capability. It also has 2 megawords of
on-board memory.
Additional memory for the HMPU processor in the A
X
M node is provided
by a QMEM board. A minimum of 6 megawords is required to support
R500 software.
The HMPU board does not have LCN interface circuits and consequently
must always have an LLCN board as its partner to form the kernel for the
A
X
M LCN node.
HMPU Indicators
The HMPU board indicators are visible from the free edge of the board
while it is installed in a chassis. They provide visual indications
regarding the existing conditions on the board.
An indicator diagram follows:
The HMPU indicators are illustrated in the following diagram:
Self-Test
Error
Pass MOD
Test
(Green)
RST/PWR
Fail
Data
Compare
Error
DTAK
Time
Out
BGAK
Time
Out
Data
Parity
Error
Bus
Error
Node
Address/Error
Display
EDAC
Multi-Bit
Error
EDAC
Single-Bit
Error
Access
Violation
(HMPU Only)
Red LEDs
40023
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